Bibliographic Database
"Distributed Arithmetic based Hybrid Architecture for Multiple Transforms",
International Conference signal Processing and Communication (ICSC 2018): Springer, 2018.
"Convolution Based Efficient Architecture for 1-D DWT",
Computing, Communication and Automation, International Conference on: IEEE, 2017.
"Pipelined Architecture for Filter Bank Based 1-D DWT",
Signal Processing and Integrated Networks (SPIN), 2016 3rd International Conference on: IEEE, pp. 47-52, 2016.
"Modified MLBF Based Architecture for 1-D DWT",
Computational Intelligence and Computing Research (ICCIC), 2015 IEEE International Conference on: IEEE, pp. 1-4, 2015.
"Systolic Architecture Implementation of 1D DFT and 1D DCT",
Signal Processing, Informatics, Communication and Energy Systems (SPICES), 2015 IEEE International Conference on: IEEE, pp. 1-5, 2015.
"Triple Matrix Product Based 2D Systolic Implementation of Discrete Fourier Transform",
Circuits, Systems, and Signal Processing, vol. 34, issue 10: Springer US, pp. 3221-3239, 2015.
"Systolic Array Implementation of DFT with Reduced Multipliers Using Triple Matrix Product",
Advances in Signal Processing and Intelligent Recognition Systems: Springer, Cham, pp. 311-322, 2014.
"Reduced Complexity Architecture for Convolution Based Discrete Cosine Transform",
Electronic System Design (ISED), 2013 International Symposium on: IEEE, pp. 67-71, 2013.