Systolic Array Implementation of DFT with Reduced Multipliers Using Triple Matrix Product

Publication Type:

Conference Proceedings

Source:

Advances in Signal Processing and Intelligent Recognition Systems, Springer, Cham, p.311-322 (2014)

URL:

https://link.springer.com/chapter/10.1007/978-3-319-04960-1_28

Keywords:

Department of Computer Science and Engineering